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A two-chip intermediate frequency (IF) receiver path solution from Analog Devices Inc. (ADI) is tailored to dramatically improve the data bandwidth and capacity of next-generation, multicarrier wireless base stations compatible with emerging 3G cellular transmission standards. Together, the dual-channel AD8376 variable gain amplifier (VGA) and AD6655 IF diversity receiver chips replace 48 discrete components, enabling 3G micro- and pico-cell base stations with substantially reduced power consumption and physical volume, said the supplier. Optimized to handle the main and diversity receive paths simultaneously, each radio channel can handle up to six carriers. According to ADI, the VGA and IF diversity receiver ICs also increase automatic gain-control (AGC) loop performance by 100 times existing options, thereby improving base station receiver sensitivity and dynamic range.

Implemented in third-generation SOI silicon germanium (SiGe) complementary bipolar (CB) process, the AD8376 is the first digitally controlled VGA that enables 1 dB gain-step resolution at the highest IFs, stated ADI's marketing and applications manager, Chris Cloninger. Plus, according to the maker, it offers the industry's best linearity with output IP3 (OIP3) of 50 dBm at 140 MHZ. This level of performance and step resolution simplifies receiver AGC, and enables wideband multicarrier radio platforms. A fine-step AGC loop allows the designer to maximize the ADC's dynamic range, which is critical when handling 3G or WiMAX multicarrier wideband input signals.

Besides fine-gain step adjustment for digital radio receivers, the dual-channel VGA offers a -3 dB bandwidth of 690 MHz, supporting high IF sampling receiver architectures within cellular and broadband WiMAX receivers. An independent 5-pin digital interface allows the user to take advantage of a 24 dB gain range and 1 dB gain-step resolution. The AD8376 is designed to replace discrete attenuator and IF amplifiers, offering considerable board and package density savings. The power consumption for the VGA is 130 mA per channel, meaning 130 mA for the single and 260 mA for the dual. With 50 dBm OIP3 on 130mA of quiescent current and +5 V supply, current consumption is also significantly reduced, noted Cloninger.

Similarly, using 0.18 µm CMOS process, the AD6655 integrates many of the functions required for diversity receive path in a single device, including an ultralow-latency peak detector and an rms signal power monitor that can be used in conjunction with the AD8376 and logic to form a flexible AGC. In addition, the AD6655 includes the industry's fastest 14-bit pipelined analog-to-digital converter (ADC), at 150 million samples per second (Msps), followed by a digital downconverter (DDC). The DDC functionality includes a 32-bit numerically controlled oscillator (NCO), a decimating half-band filter and an output finite-impulse response (FIR) filter. Together, these provide an effective bandpass filtering function and reduce the output rate, which yields a signal-to-noise ratio (SNR) of 75 dB at 70 MHz, an improvement of 2.5 dB over the typical ADC. In effect, the IF input signal passes through several stages before it appears at the output port(s) as a filtered, downconverted, decimated digital signal.

The AD6655 is offered in 12- (AD6653) and 14-bit resolutions with sample rates of 80 Msps, 105 Msps, 125 Msps and 150 Msps.

Housed in a 32-lead lead-frame chip-scale package (LFCSP), the AD8376 is sampling with full production scheduled for June. It is priced at $6.25 per unit in 1000-piece quantities. A single-channel version, the AD8375, is sampling with full production slated for June. Available in 24-lead LFCSP, the AD8375 is priced at $4.25 per unit in 1,000-piece quantities. Likewise, the AD6655 is sampling with full production also planned for June. The 12-bit version, the AD6653, is priced at $57.97 and the 14-bit at $97.50, both in 1000-piece quantities. The devices are available in a 9 mm × 9 mm 64-lead LFCSP.
Analog Devices
(781) 937-1428
www.analog.com

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